* We clear the TSC in the last loop:
*/
if (i == NR_LOOPS-1)
- write_tsc(0, 0);
+ write_tsc(0L);
/*
* Wait for all APs to leave the synchronization point:
rdtscll(tsc_values[smp_processor_id()]);
if (i == NR_LOOPS-1)
- write_tsc(0, 0);
+ write_tsc(0L);
atomic_inc(&tsc_count_stop);
while (atomic_read(&tsc_count_stop) != num_booting_cpus()) mb();
struct cpu_time *t = &this_cpu(cpu_time);
struct time_scale sys_to_tsc = scale_reciprocal(t->tsc_scale);
s_time_t stime_delta;
- u64 tsc_delta;
+ u64 new_tsc;
if ( boot_cpu_has(X86_FEATURE_NOSTOP_TSC) )
return;
if ( stime_delta < 0 )
stime_delta = 0;
- tsc_delta = scale_delta(stime_delta, &sys_to_tsc);
+ new_tsc = t->local_tsc_stamp + scale_delta(stime_delta, &sys_to_tsc);
- wrmsrl(MSR_IA32_TSC, t->local_tsc_stamp + tsc_delta);
+ write_tsc(new_tsc);
}
/***************************************************************************
atomic_inc(&r->semaphore);
if ( i == 0 )
- write_tsc((u32)r->master_tsc_stamp,
- (u32)(r->master_tsc_stamp >> 32));
+ write_tsc(r->master_tsc_stamp);
while ( atomic_read(&r->semaphore) != (2*total_cpus - 1) )
mb();
mb();
if ( i == 0 )
- write_tsc((u32)r->master_tsc_stamp,
- (u32)(r->master_tsc_stamp >> 32));
+ write_tsc(r->master_tsc_stamp);
atomic_inc(&r->semaphore);
while ( atomic_read(&r->semaphore) > total_cpus )
} while(0)
#endif
-#define write_tsc(val1,val2) wrmsr(0x10, val1, val2)
+#define write_tsc(val) wrmsrl(MSR_IA32_TSC, val)
#define rdpmc(counter,low,high) \
__asm__ __volatile__("rdpmc" \